US to block China’s access to essential semiconductor design software

The US has ordered companies that make software used to design semiconductors to stop selling to China without first obtaining export licenses.

The restrictions go beyond software alone, covering chemicals for semiconductors, butane and ethane, machine tools, and aviation equipment, Reuters reported, citing two people familiar with the development.

“On May 23, the US Government informed the Electronic Design Automation (EDA) industry about new export controls on EDA software to China and Chinese military end users globally,” said a Siemens EDA spokesperson. “Siemens has supported customers in China for more than 150 years and will continue to work with our customers globally to mitigate the impact of these new restrictions while operating in compliance with applicable national export control regimes. The company continues to support our employees and customers around the world who are using our technology to transform the everyday.”

This represents the latest chapter in a tech war that began with restrictions on selling actual semiconductors to China. Now, the US is targeting the tools needed to design those chips — a potentially more damaging approach.

Strategic shift to upstream controls

Electronic design automation software makers — including industry leaders Cadence, Synopsys, and Siemens EDA — were sent notifications by the Commerce Department last Friday to cease supplying their technology to Chinese customers, the report said. The department will review license requests on a case-by-case basis, it added.

The financial implications are substantial. Synopsys and Cadence earn annual revenue of about 16% and 12% from their China business.

“With Cadence and Synopsys being US-based companies and Siemens contributing to more than 90% share of the EDA tools globally, this move further tightens EDA software sales in China,” said Neil Shah, VP for research and partner at Counterpoint Research. “EDA tools cannot be substituted and are the foundation to chip design and manufacturing.”

What makes this strategically different is its upstream focus. Manish Rawat, semiconductor analyst at TechInsights, explained that, unlike previous hardware restrictions, “the new focus on EDA software targets the critical tools essential for designing advanced chips (5nm and below). This upstream control aims to block innovation before chips are manufactured, making it a more preemptive and disruptive tactic.”

Why now?

The timing reflects broader strategic recalibration. Rawat noted that “the US has shifted its strategy, now seeing China’s push for tech self-sufficiency — especially in AI and semiconductors — as a growing national security threat.” Since the 2020 CHIPS Act, coordinated export controls with allies like Japan and the Netherlands have strengthened US resolve.

Sanchit Vir Gogia, chief analyst and CEO at Greyhound Research, observed that targeting design-phase technologies “seeks to constrain the conceptual stage of advanced chip development — not merely production.”

The timing may also serve as “a strategic bargaining tool amid paused tariffs and ongoing diplomacy,” Rawat suggested, signaling US willingness to escalate tech restrictions to strengthen its negotiating position.

The EDA software packages from companies like Synopsys and Cadence are central to modeling, simulation, and verification of complex semiconductor architectures. “The software lifecycle of these tools is super important with updates, patches, and support to be at the forefront of leading edge, which will stop with the restrictions on licensing,” Shah pointed out.

This ongoing dependency means even alternative tools would struggle to keep pace with rapidly evolving chip design requirements without continuous vendor support.

China’s long road to independence

For China, developing viable alternatives presents enormous challenges. While Chinese companies like Empyrean, Primarius, and Entasys have emerged as domestic providers, they remain far behind.

“Developing advanced EDA software on par with Synopsys or Cadence is highly complex, requiring decades of R&D,” Rawat explained. “Fully closing the gap — especially for cutting-edge sub-7nm chip design — could take 5 to 10 years or more.”

Gogia added that “while notable progress has been made in selected areas of analog and layout tooling, full-stack integration across simulation, IP compatibility, and foundry certification continues to lag.”

The gap is widening. Shah noted that Cadence recently announced M2000 Supercomputers, integrating advanced AI into EDA workflows. “This widens the gap between what China can build with an indigenous toolchain, as these US companies are miles ahead.”

However, China may have breathing room. “China has been relegated to access to advanced process nodes, so in the near to mid-term, they might not need an advanced toolchain as they won’t be able to design or manufacture advanced chips,” Shah observed.

Beijing’s likely response

China’s response will likely be multifaceted. “Beijing is likely to accelerate funding through increased subsidies and incentives for domestic EDA startups,” Rawat said. “It will also aggressively recruit global experts and repatriate Chinese talent with semiconductor software expertise.”

Beyond domestic development, “China may build alternative chip design ecosystems less reliant on US intellectual property, though these will initially lag in sophistication,” Rawat added. Diplomatic measures may include reciprocal restrictions on US firms or supply chains involving Chinese technology.

Toward a bifurcated design world

The restrictions are accelerating what analysts see as an inevitable split. Gogia described emerging “parallel EDA stacks” where “global design ecosystems may begin to diverge, with export controls catalyzing separate compliance frameworks and IP governance models.”

“This is accelerating a split into two spheres: a US-led system using Western tools and IP protections, and a China-led system focused on domestic tools and foundries,” Rawat added.

This separation isn’t just technical — it’s institutional. “Engineering workflows, legal oversight, cloud infrastructure, and partner ecosystems are all being restructured to manage compliance in a fractured regulatory environment,” Gogia said.

Global industry implications

For multinational companies, this fragmentation creates significant challenges. “Multinational firms may need to adopt dual design workflows and navigate stricter compliance, affecting partnerships and operational efficiency,” Rawat said.

Organizations face maintaining duplicate systems and complex compliance across jurisdictions. Smaller firms may find duplication costs force market exits or a narrowed geographic focus.

To mitigate risks, companies “are likely to diversify supply chains and expand in neutral regions like India, Vietnam, and Singapore, emerging as new semiconductor design hubs,” Rawat pointed out.

The EDA software restrictions represent the latest evolution in US-China tech competition, moving from end-product controls to fundamental design capabilities.

“US continues to find stranglehold on China with critical software and hardware to cut off access to critical and advanced tools,” Shah said.

For enterprise technology leaders, this signals an era where geopolitical considerations increasingly shape technology architecture decisions, requiring strategic planning for an increasingly fragmented world. Cadence and Synopsys did not respond to requests for comment by publication time.