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New release of SweRVolf RISC-V SoC project aims for lower barrier to entry

Wednesday September 15, 2021. 06:28 PM , from TheRegister
FOSSi Foundation's Olof Kindgren on the origins, future, and success of the RISC-V ISA
The SweRVolf project, a fully open system-on-chip designed as a reference platform for Western Digital's RISC-V SweRV cores, has announced a major new release promising lower barriers to entry for those looking to experiment.…

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